Ryzen 3000 AMD Marketing
This is where I pick out some slides from the Decks AMD provided that I find interesting and I discuss them below.
If we are to know where we are going, we must first know where we have been. Here, we travel back to the well even just recently, but this is how Zen and Zen+ worked. It relied heavily on infinity fabric to interconnect all CCX’s and depending on CPU and platform, it is possible that not all CCX’s would have direct memory access. But, It is worth mentioning that this is the first implementation of individual dies for a cluster or CCX containing some of the cores for the CPU.
Next up we see a naked Ryzen 3000 and as you can see, there are three chips here. The two labeled Ryzen are CCX’s holding up to 8 cores per chiplet. These are 7nm dies, while the adjacent larger die is a 12nm die which is the I/O die. this now allows every CCX to connect into the I/O die and the I/O die acts like a northbridge of sorts handling not just interconnect for I/O but also memory. It is worth noting taht AMD touted the new IMC and claimed it can achieve some very impressive performance which has always been a sore spot for Ryzen.
Here, we now see the difference in this multi-chip solution of the Ryzen 3000 and you can see that much of the I/O work is now appropriately offloaded to the I/O die. This allows for even better yields via a chiplet design as the 7nm parts are strictly the core CCX’s and necessary interconnects for the fabric layer and anything else necessary.
Now we look at the topology for the dual CCX module and the interconnect between the CCX and I/O die. as you can see the infinity fabric layer connects the I/O top the CCX’s and therefore knowing how heavily ZEN relies on memory speed, the improved IMC will likely be a huge help in ensuring that the IPC/performance is best it can be by supporting higher overall frequencies.
Here, AMD shows off a shot of the dual CCX layout and I/O die with their internal routing exposed. compared to previous gen Zen based processors the entire layout has changed, so engineering a solution for routing so that pinout does not have to change and native socket compatibility is achieved is impressive in itself.
Next, up we look at AMD’s assessment of the platform based I/O and as you can see compared to Intel Z390, AMD CPU based I/O combined with their X570 I/O it is a huge leap over what Intel’s current Z390 platform offers. Intel simply has an x4 DMI link connecting the CPU to the chipset, and the only other lanes coming from the CPU is to PCIe slots for AIC use. The AMD X570/Ryzen 3000 solution has extra I/O beyond the interconnects mentioned previously to even support 4 lanes of PCIe for M.2 devices and a quartet of USB 3.2 Gen 2 ports. These are directly CPU attached which means they are free from and normal constraint you may have with the chipset based link where if a lot of I/O is used you may see congestion as all of the data hits the x4 link.
Here we get a visual representation of what I explained before. Here you can see we can hang a storage device directly from CPU lanes without taking them from the main GPU slot or requiring it to go through the chipset link.
Here we zoom out a bit more and now can see the flexible array of I/O available on the X570. there are many options for the board makers to decide how they want to layout PCIe for various storage and connectivity options. This means each board manufacturer can set up a board feature and layout to best serve the target markets needs for that model.
this slide I had to include simply because in my many years of marketing experience I never got the opportunity to use something like ‘killer features’ in a product deck. This is awesome and kind of speaks to the type of people that work at AMD, I know many of them and possibly the one who made this deck, and the fact that they could get this approved means that they gotta be at least somewhat fun people and know that people hate powerpoint, so at least make it interesting. That aside this slide does make some important points. it condenses most of what I have been talking about into a single slide to give a quick reference of what is cool and important.
Next up is some performance oriented stuff. First up is part of the new IMC discussion which has to do with how memory scales. One important thing to note is that memory speed capabilities on the Ryzen 3000 chip is very good, and you can see what I accomplished in the overclocking section when pushing some good B-Die. However do note that latency will go up a bit on your memory as you surpass 3600MHz, this is due to the infinity fabric being linked to the DRAM speed, and once you pass 3600-3733 it will switch from 1:1 to 2:1 which will allow full stability but will cause an increase in latency of 7-9ns in my experience thus far, so it matches AMD’s claims.
Another major note for AMD is that their Ryzen 3000 series and X570 are the first consumer platform to offer PCIe 4.0 which is double the theoretical bandwidth of PCIe 3.0. This means board quality on X570 boards are gonna have to be very solid to pass signal integrity needs to be certified for PCIe 4.0.
I know everyone hates windows updates, especially when windows 10 tries to shove them down your throat no matter if you want them or not. They don’t even make airplane noises when doing it. But with that out of the way, for once I can say I am excited for a windows update as it is a critical one for Ryzen users. Previously there were some pretty bad issues with Microsoft not recognizing the topology of the CPU in regards to Ryzen which meant it was not aware of directly attached memory or which CCX a core it was using may be on. This led to some latency problems as windows could assign work to a core on CCX 1 then another piece to a core on CCX 2 and data would have to travel between the fabric layers to get to nonlocal resources or data. Now with the recent update which is rolling out as I type this or most systems will have an option in windows update where you can manually choose to install it. But this update will enable topology awareness which allows windows scheduler to do a better job assigning work to relevant cores in a more efficient manner.
AMD considers the Ryzen 7 3700X ‘Thew sweet spot for enthusiasts’ which is a bold statement for a low power part that is the last R7 chip on the stack before transitioning to an R5.
Here AMD supplies a rough breakdown of their claimed performance in Cinebench R20 both single and multi-core tests to show their performance percentages gained over the baseline.
This is what we got to test the new Ryzen 3000 platform
Here is the massive pile of gear that came with my media kit to review Ryzen 3000 and of course the new NAVI powered Radeon 5700 series.
Here is everything we received for today’s launch articles.
- AMD Ryzen 9 3900X
- AMD Ryzen 7 3700X
- Radeon RX 5700 XT
- Radeon RX 5700
- MSI X570 Godlike Motherboard
- ASUS Crosshair VIII Hero WiFi
- Gskill Royal 16GB (2x8GB) 3600MHz C16 memory kit
- Corsair MP 600 PCIe 4.0 2TB 2280 NVMe SSD
Yes, that’s a lot of stuff I had to look at, take images of and test. And let us not forget during this Nvidia dropped the new RTX SUPER on us as well.
Now lets take a look at each part separately.